Pin Swapping to Optimize Routing

●Pin swapping allowing for constraints
As board data can be viewed, pin swapping can be reviewed while taking into account positional relations with surrounding components and the routing pattern area. The use of device libraries permits consideration of data relating to constraints such as bank and IO standards.

●Reflecting results in FPGA design tools
Because the results of pin swapping carried out with GPM can be output in the form of a pin constraint file that can be directly imported by compatible FPGA design tools, it is easy to use these tools to carry out verification and readjustment of pin assignments in FPGA design tools.